Source: alliance Section: electronics Priority: optional Maintainer: Debian QA Group Build-Depends: debhelper (>= 9), bison, flex, texlive-latex-recommended, texlive-fonts-recommended, texlive-generic-recommended, texlive-pictures, texlive-latex-extra, ghostscript, automake, autoconf, libtool, libmotif-dev, libxt-dev, libxpm-dev, dpkg-dev (>= 1.16.1~), python (>= 2.6.6-3~), transfig, graphicsmagick-imagemagick-compat Homepage: https://soc-extras.lip6.fr/en/alliance-abstract-en/ Standards-Version: 3.9.6 Package: alliance Architecture: any Depends: ${shlibs:Depends}, ${misc:Depends} Description: VLSI CAD Tools Alliance is a complete set of free CAD tools and portable libraries for VLSI design. It includes a VHDL compiler and simulator, logic synthesis tools, and automatic place and route tools. . A complete set of portable CMOS libraries is provided, including a RAM generator, a ROM generator and a data-path compiler. . Alliance is the result of more than ten years effort spent at ASIM department of LIP6 laboratory of the Pierre et Marie Curie University (Paris VI, France). . Alliance has been used for research projects such as the 875 000 transistors StaCS superscalar microprocessor and 400 000 transistors IEEE Gigabit HSL Router. . Alliance provides CAD tools covering most of all the digital design flow: * VHDL Compilation and Simulation * Model checking and formal proof * RTL and Logic synthesis * Data-Path compilation * Macro-cells generation * Place and route * Layout edition * Netlist extraction and verification * Design rules checking