Source: arachne-pnr Maintainer: Debian Science Maintainers Uploaders: Ruben Undheim Section: electronics Priority: optional Build-Depends: debhelper-compat (= 13), fpga-icestorm-chipdb (>= 0~20181109git9671b76), txt2man Standards-Version: 4.5.1 Vcs-Browser: https://salsa.debian.org/science-team/arachne-pnr Vcs-Git: https://salsa.debian.org/science-team/arachne-pnr.git Homepage: https://github.com/YosysHQ/arachne-pnr Rules-Requires-Root: no Package: arachne-pnr-chipdb Architecture: all Multi-Arch: foreign Depends: ${misc:Depends} Description: Chip db files for arachne-pnr Arachne-pnr implements the place and route step of the hardware compilation process for FPGAs. It accepts as input a technology-mapped netlist in BLIF format, as output by the Yosys synthesis suite for example. It currently targets the Lattice Semiconductor iCE40 family of FPGAs. Its output is a textual bitstream representation for assembly by the IceStorm icepack command. The output of icepack is a binary bitstream which can be uploaded to a hardware device. . This package contains the binary versions of the chipdb files needed by arachne-pnr Package: arachne-pnr Architecture: any Depends: ${shlibs:Depends}, ${misc:Depends}, arachne-pnr-chipdb, fpga-icestorm Suggests: yosys, nextpnr Description: Place and route tool for iCE40 family FPGAs Arachne-pnr implements the place and route step of the hardware compilation process for FPGAs. It accepts as input a technology-mapped netlist in BLIF format, as output by the Yosys synthesis suite for example. It currently targets the Lattice Semiconductor iCE40 family of FPGAs. Its output is a textual bitstream representation for assembly by the IceStorm icepack command. The output of icepack is a binary bitstream which can be uploaded to a hardware device. . Together, Yosys, arachne-pnr and IceStorm provide an fully open-source Verilog-to-bistream tool chain for iCE40 1K and 8K FPGA development. . The authors of arachne-pnr have now prepared its successor 'nextpnr'.