Source: iverilog Section: electronics Maintainer: Debian Electronics Team Uploaders: أحمد المحمودي (Ahmed El-Mahmoudy) Build-Depends: debhelper-compat (= 13), gperf, bison, flex, zlib1g-dev, libbz2-dev, libreadline-dev, python3-sphinx Standards-Version: 4.7.3 Homepage: https://github.com/steveicarus/iverilog Vcs-Git: https://salsa.debian.org/electronics-team/iverilog.git Vcs-Browser: https://salsa.debian.org/electronics-team/iverilog Package: iverilog Architecture: any Depends: ${shlibs:Depends}, ${misc:Depends}, ${sphinxdoc:Depends} Built-Using: ${sphinxdoc:Built-Using}, Replaces: verilog (<< 10.2-1.1~) Breaks: verilog (<< 10.2-1.1~) Provides: verilog Suggests: gtkwave Description: Icarus verilog compiler Icarus Verilog is intended to compile all of the Verilog HDL as described in the IEEE-1364 standard. It is not quite there yet. It does currently handle a mix of structural and behavioral constructs. . The compiler can target either simulation, or netlist (EDIF).