-----BEGIN PGP SIGNED MESSAGE----- Hash: SHA512 Format: 1.8 Date: Thu, 12 Nov 2020 15:03:36 -0300 Source: intel-microcode Architecture: source Version: 3.20201110.1 Distribution: unstable Urgency: medium Maintainer: Henrique de Moraes Holschuh <hmh@debian.org> Changed-By: Henrique de Moraes Holschuh <hmh@debian.org> Closes: 974533 Changes: intel-microcode (3.20201110.1) unstable; urgency=medium . * New upstream microcode datafile 20201110 (closes: #974533) * Implements mitigation for CVE-2020-8696 and CVE-2020-8698, aka INTEL-SA-00381: AVX register information leakage; Fast-Forward store predictor information leakage * Implements mitigation for CVE-2020-8695, Intel SGX information disclosure via RAPL, aka INTEL-SA-00389 * Fixes critical errata on several processor models * Reintroduces SRBDS mitigations(CVE-2020-0543, INTEL-SA-00320) for Skylake-U/Y, Skylake Xeon E3 * New Microcodes sig 0x0005065b, pf_mask 0xbf, 2020-08-20, rev 0x700001e, size 27648 sig 0x000806a1, pf_mask 0x10, 2020-06-26, rev 0x0028, size 32768 sig 0x000806c1, pf_mask 0x80, 2020-10-02, rev 0x0068, size 107520 sig 0x000a0652, pf_mask 0x20, 2020-07-08, rev 0x00e0, size 93184 sig 0x000a0653, pf_mask 0x22, 2020-07-08, rev 0x00e0, size 94208 sig 0x000a0655, pf_mask 0x22, 2020-07-08, rev 0x00e0, size 93184 sig 0x000a0661, pf_mask 0x80, 2020-07-02, rev 0x00e0, size 93184 * Updated Microcodes sig 0x000306f2, pf_mask 0x6f, 2020-05-27, rev 0x0044, size 34816 sig 0x000406e3, pf_mask 0xc0, 2020-07-14, rev 0x00e2, size 105472 sig 0x00050653, pf_mask 0x97, 2020-06-18, rev 0x1000159, size 33792 sig 0x00050654, pf_mask 0xb7, 2020-06-16, rev 0x2006a08, size 35840 sig 0x00050656, pf_mask 0xbf, 2020-06-18, rev 0x4003003, size 52224 sig 0x00050657, pf_mask 0xbf, 2020-06-18, rev 0x5003003, size 52224 sig 0x000506c9, pf_mask 0x03, 2020-02-27, rev 0x0040, size 17408 sig 0x000506ca, pf_mask 0x03, 2020-02-27, rev 0x001e, size 15360 sig 0x000506e3, pf_mask 0x36, 2020-07-14, rev 0x00e2, size 105472 sig 0x000706a8, pf_mask 0x01, 2020-06-09, rev 0x0018, size 75776 sig 0x000706e5, pf_mask 0x80, 2020-07-30, rev 0x00a0, size 109568 sig 0x000806e9, pf_mask 0x10, 2020-05-27, rev 0x00de, size 104448 sig 0x000806e9, pf_mask 0xc0, 2020-05-27, rev 0x00de, size 104448 sig 0x000806ea, pf_mask 0xc0, 2020-06-17, rev 0x00e0, size 104448 sig 0x000806eb, pf_mask 0xd0, 2020-06-03, rev 0x00de, size 104448 sig 0x000806ec, pf_mask 0x94, 2020-05-18, rev 0x00de, size 104448 sig 0x000906e9, pf_mask 0x2a, 2020-05-26, rev 0x00de, size 104448 sig 0x000906ea, pf_mask 0x22, 2020-05-25, rev 0x00de, size 103424 sig 0x000906eb, pf_mask 0x02, 2020-05-25, rev 0x00de, size 104448 sig 0x000906ec, pf_mask 0x22, 2020-06-03, rev 0x00de, size 103424 sig 0x000906ed, pf_mask 0x22, 2020-05-24, rev 0x00de, size 103424 sig 0x000a0660, pf_mask 0x80, 2020-07-08, rev 0x00e0, size 94208 * 0x806c1: remove the new Tiger Lake update: causes hang on cold/warm boot https://github.com/intel/Intel-Linux-Processor-Microcode-Data-Files/issues/44 INTEL-SA-00381 AND INTEL-SA-00389 MITIGATIONS ARE THEREFORE NOT INSTALLED FOR 0x806c1 TIGER LAKE PROCESSORS by this package update. Contact your system vendor for a firmware update, or wait fo a possible fix in a future Intel microcode release. * source: update symlinks to reflect id of the latest release, 20201110 * source: ship new upstream documentation (security.md, releasenote.md) Checksums-Sha1: b446d283d01ec38f8975ebc6087fc3c2f66e1481 1789 intel-microcode_3.20201110.1.dsc d6768697fd96e912667bb284475b2d6747d5ac08 3438052 intel-microcode_3.20201110.1.tar.xz f2a38849608dd69136c8ba17ff756b3914a6e60f 6397 intel-microcode_3.20201110.1_amd64.buildinfo Checksums-Sha256: 55eb092cc5e1c31a27cc492023d43aad5c3644d610977f04edffbbeabfb07932 1789 intel-microcode_3.20201110.1.dsc 85c7260e735521a5ee35f16c745abc4875df9539bb54b03115f971f2fca5cc13 3438052 intel-microcode_3.20201110.1.tar.xz 088d78fba2b25743c612a8b1b1d24845ce16ff84b213e29c38d3e4536b8d4ddc 6397 intel-microcode_3.20201110.1_amd64.buildinfo Files: 69ecc286ae757f3d5d4d931a0538a4a5 1789 non-free/admin standard intel-microcode_3.20201110.1.dsc 5a20422e1e5db13eab7d0a66fed20293 3438052 non-free/admin standard intel-microcode_3.20201110.1.tar.xz 44a9944f6947dcb7b757c04103c7c111 6397 non-free/admin standard intel-microcode_3.20201110.1_amd64.buildinfo -----BEGIN PGP SIGNATURE----- iQIzBAEBCgAdFiEEQWtPby40keG61F/9KC7xu6bDcIUFAl+thUAACgkQKC7xu6bD cIW48A//dgGSa6AbyPYDFCWl2fqjog9OVkhApg9KHHgCm3VsGcTVGfcEv9gCz7y9 C6skeYNT5VokNOtDWvEDyxsLVfff5AFMN/udVZV01VADXOJzIxmlR8hrd2iTQ/RN kPFPT5Oqwo8gKTtrp6tv7gxKPmCUYVHoyJq4sHfzF/jvUGz0KJZMhi7Jzw/da/B6 8tRZjrP8mFWO1UfDcZy7dJ3qUhg+VqSIwlGf2snyUU7T2s30bNiEGSVwURq33dR6 vHgiALvWvnQByqc8CvUd7Ki7zWaRml9h5rTNXw+tdjCY6cTVRXbw9My2Yj2LhE/Z 5dkQooDj8U9JFNo49MJNbjNAYmbheP62frYRVTx8ksRPlLigxELW6rrmPO/VbJ2d a9Om3D90s7iqGZMRadcFHSoFoh/Ec/wQ9iGWRzn8gWgToWZKwP98OBi8gkQEt12w M3E/EEB5kPjzYK9X55MOavtig4jXnsessk/EXcDypurRGEqcACYE3VrlA52Z7UYx E1R3gxsWg//ZDH9OZBmb9h4xwpHtrydq+acwwTED7f+egoq5Wu64veqIOUc6MoUA WpAYtnkTFgEQbt2LQBU2izmiwgTt/BunYE7KO6vtwT2fp8K21Tu5z7XplPhEcoDN Mfjn54b8o09I2XR1R3uGyG7nryY5u22u5hEug0UtuoXvrP//s7c= =EQHC -----END PGP SIGNATURE-----
