-----BEGIN PGP SIGNED MESSAGE----- Hash: SHA512 Format: 1.8 Date: Mon, 09 Nov 2015 23:07:32 -0200 Source: intel-microcode Binary: intel-microcode Architecture: source amd64 Version: 3.20151106.1 Distribution: unstable Urgency: medium Maintainer: Henrique de Moraes Holschuh <hmh@debian.org> Changed-By: Henrique de Moraes Holschuh <hmh@debian.org> Description: intel-microcode - Processor microcode firmware for Intel CPUs Closes: 777356 Changes: intel-microcode (3.20151106.1) unstable; urgency=medium . * New upstream microcode data file 20151106 + New Microcodes: sig 0x000306f4, pf mask 0x80, 2015-07-17, rev 0x0009, size 14336 sig 0x00040671, pf mask 0x22, 2015-08-03, rev 0x0013, size 11264 + Updated Microcodes: sig 0x000306a9, pf mask 0x12, 2015-02-26, rev 0x001c, size 12288 sig 0x000306c3, pf mask 0x32, 2015-08-13, rev 0x001e, size 21504 sig 0x000306d4, pf mask 0xc0, 2015-09-11, rev 0x0022, size 16384 sig 0x000306f2, pf mask 0x6f, 2015-08-10, rev 0x0036, size 30720 sig 0x00040651, pf mask 0x72, 2015-08-13, rev 0x001d, size 20480 * This massive Haswell + Broadwell (and related Xeons) update fixes several critical errata, including the high-hitting BDD86/BDM101/ HSM153(?) which triggers an MCE and locks the processor core (LP: #1509764) * Might fix critical errata BDD51, BDM53 (TSX-related) * source: remove superseded upstream data file: 20150121 * Add support for supplementary microcode bundles: + README.source: update and mention supplementary microcode + Makefile: support supplementary microcode Add support for supplementary microcode bundles, which (unlike .fw microcode override files) can be superseded by a higher revision microcode from the latest regular microcode bundle. Also, fix the "oldies" target to have its own exclude filter (IUC_OLDIES_EXCLUDE) * Add support for x32 arch: + README.source: mention x32 + control,rules: enable building on x32 arch (Closes: #777356) * ucode-blacklist: add Broadwell and Haswell-E signatures Add a missing signature for Haswell Refresh (Haswell-E) to the "must be updated only by the early microcode update driver" list. There is at least one report of one of the Broadwell microcode updates disabling TSX-NI, so add them as well just in case Checksums-Sha1: 91962f464a234493a5e8c224733f2a90f8d2ea58 1774 intel-microcode_3.20151106.1.dsc 8c8a7ba10190b0b8e9f8a4c3ecf7b79615d03f08 977788 intel-microcode_3.20151106.1.tar.xz b1892bc7df1268b7003065be1dff81def78df1a6 472296 intel-microcode_3.20151106.1_amd64.deb Checksums-Sha256: e0772bad2d28fae5e7a83ebb6b38a18ad46a8a042ca9358e4ac3522c477730db 1774 intel-microcode_3.20151106.1.dsc 04a15ad7d0234d47b303820913ab5889b64d95e40f95ec1ce2f86814680984ff 977788 intel-microcode_3.20151106.1.tar.xz 1f3a7740da8681fd077de3b82f08e4f456e7e7fc69cd014ddcb772bf2d5f9c93 472296 intel-microcode_3.20151106.1_amd64.deb Files: 9de9a509e5eb21d8e1b75908d4d54ede 1774 non-free/admin standard intel-microcode_3.20151106.1.dsc efce0b8f5dc73efc9722020313583954 977788 non-free/admin standard intel-microcode_3.20151106.1.tar.xz ad15d5cb6af0bd1f15db2cb4221c4cbf 472296 non-free/admin standard intel-microcode_3.20151106.1_amd64.deb -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAEBCgAGBQJWQUYNAAoJEJE3+9PebwqT5rsP/0T6lRRPj4sUAVC3HElNEPKp ggEIigz1nqLkb5/Uh2zuX/a4OOqObfkT/1bHCbtMR69oP+wVWY5r9zElzcR5jMrp lCyvidDHi1MsbtUZltUDdeKElPm8XM+uIzR4tLzpVz1ft3Sjb9SVG9JVd+w04mZE s+H2Z45NRUuUm+lwxKC/kec8PSj1+KI6EmFTRWKFj9lCNYX2kee5d+jd/EfIc9IW fOwMMAVq6N1NRaKVjJ99rYgy08MA9pnGvjMBNfD2sbe8vhcpZaTBhflhTpeizkpG aa/8Q6e/1rPQvg6VKQSeCqx0gW8ESVj0/8OUBeuuCWZ2xyetP+ovYzowmvPFayxT Ua8zxRFnQL30y2E2qOqGNGKf18hVwpaKsT/7tvZxywUvJ/Y0PHOAipZ7mi01pGkk FdVrNZRll8WYrwS5R8dJNhR4Hr+y59epCQS6psPA0K/w+17Yujd7uONptaofBYcF iUtnDp/Ux45Vt696/v7lpyovoRk+7mFLsg0XsCiDrSjare3/SBtApxUMNqTnUfjq XgUwDNh02UtYvK3jQRcHaUDHefo8NtvVpWRQZqiZZ3EV4lfTVjTy6Emwz2NlY4VQ QgDI7xONg63vEkgN/gUJKkjiAlddMIjEmcAlzj7TcMGxVu9smuvudj1/r/NNeMbG lzqo5rxII/5mFy1SUu6H =J0ia -----END PGP SIGNATURE-----
