-----BEGIN PGP SIGNED MESSAGE----- Hash: SHA512 Format: 1.8 Date: Wed, 14 Mar 2018 09:21:24 -0300 Source: intel-microcode Binary: intel-microcode Architecture: amd64 i386 source Version: 3.20180312.1 Distribution: unstable Urgency: medium Maintainer: Henrique de Moraes Holschuh <hmh@debian.org> Changed-By: Henrique de Moraes Holschuh <hmh@debian.org> Closes: 886367 Description: intel-microcode - Processor microcode firmware for Intel CPUs Changes: intel-microcode (3.20180312.1) unstable; urgency=medium . * New upstream microcode data file 20180312 (closes: #886367) + New Microcodes: sig 0x00050653, pf_mask 0x97, 2018-01-29, rev 0x1000140, size 30720 sig 0x00050665, pf_mask 0x10, 2018-01-22, rev 0xe000009, size 18432 + Updated Microcodes: sig 0x000206a7, pf_mask 0x12, 2018-02-07, rev 0x002d, size 12288 sig 0x000206d6, pf_mask 0x6d, 2018-01-30, rev 0x061c, size 18432 sig 0x000206d7, pf_mask 0x6d, 2018-01-26, rev 0x0713, size 19456 sig 0x000306a9, pf_mask 0x12, 2018-02-07, rev 0x001f, size 13312 sig 0x000306c3, pf_mask 0x32, 2018-01-21, rev 0x0024, size 23552 sig 0x000306d4, pf_mask 0xc0, 2018-01-18, rev 0x002a, size 18432 sig 0x000306e4, pf_mask 0xed, 2018-01-25, rev 0x042c, size 15360 sig 0x000306e7, pf_mask 0xed, 2018-02-16, rev 0x0713, size 16384 sig 0x000306f2, pf_mask 0x6f, 2018-01-19, rev 0x003c, size 33792 sig 0x000306f4, pf_mask 0x80, 2018-01-22, rev 0x0011, size 17408 sig 0x00040651, pf_mask 0x72, 2018-01-18, rev 0x0023, size 21504 sig 0x00040661, pf_mask 0x32, 2018-01-21, rev 0x0019, size 25600 sig 0x00040671, pf_mask 0x22, 2018-01-21, rev 0x001d, size 12288 sig 0x000406e3, pf_mask 0xc0, 2017-11-16, rev 0x00c2, size 99328 sig 0x00050654, pf_mask 0xb7, 2018-01-26, rev 0x2000043, size 28672 sig 0x00050662, pf_mask 0x10, 2018-01-22, rev 0x0015, size 31744 sig 0x00050663, pf_mask 0x10, 2018-01-22, rev 0x7000012, size 22528 sig 0x00050664, pf_mask 0x10, 2018-01-22, rev 0xf000011, size 22528 sig 0x000506e3, pf_mask 0x36, 2017-11-16, rev 0x00c2, size 99328 sig 0x000806e9, pf_mask 0xc0, 2018-01-21, rev 0x0084, size 98304 sig 0x000806ea, pf_mask 0xc0, 2018-01-21, rev 0x0084, size 97280 sig 0x000906e9, pf_mask 0x2a, 2018-01-21, rev 0x0084, size 98304 sig 0x000906ea, pf_mask 0x22, 2018-01-21, rev 0x0084, size 96256 sig 0x000906eb, pf_mask 0x02, 2018-01-21, rev 0x0084, size 98304 + Implements IBRS/IBPB/STIPB support, Spectre-v2 mitigation for: Sandybridge, Ivy Bridge, Haswell, Broadwell, Skylake, Kaby Lake, Coffee Lake + Missing production updates: + Broadwell-E/EX Xeons (sig 0x406f1) + Anniedale/Morefield, Apollo Lake, Avoton, Cherry Trail, Braswell, Gemini Lake, Denverton * Update past changelog entries with new information: Intel already had all necessary semanthics in LFENCE, so the Spectre-related Intel microcode changes did not need to enhance LFENCE. * debian/control: update Vcs-* fields for the move to salsa.debian.org Checksums-Sha1: 36303a2dd2c5bc0a99a94050005ca5bf0f9b9e28 1785 intel-microcode_3.20180312.1.dsc 887418b291f9bf9451c0215ccf681427bacefdea 1685068 intel-microcode_3.20180312.1.tar.xz ed434bdc0851ff7d48c423f2ad92267c45625054 5605 intel-microcode_3.20180312.1_amd64.buildinfo 1f273d8ebb062af49b7e5a3afcf04ca765e4e1a7 1156188 intel-microcode_3.20180312.1_amd64.deb 020f8c159f1e5a709dd833f9887fd7057be905a3 4396 intel-microcode_3.20180312.1_i386.buildinfo 47c3beafab17c1d09c575b08fc9f090beff61a44 1297124 intel-microcode_3.20180312.1_i386.deb Checksums-Sha256: 6d7571739e07a37404a6ecf690fc2ab582211e7417d3719ddcff124f4101da9b 1785 intel-microcode_3.20180312.1.dsc 6ccb295d23961c7b96a69280e30fdce939e1d905147b22b8428886b173812d52 1685068 intel-microcode_3.20180312.1.tar.xz 12b0887d082e2405a5e6cdb9a7429a01859b12d273c8c142e55a6d7a1c1dcb0f 5605 intel-microcode_3.20180312.1_amd64.buildinfo efc8856211b247307efe69d0e2b39385eecf7ca23c3e812701bf3387e20bf31b 1156188 intel-microcode_3.20180312.1_amd64.deb 5b5f40c396432031103ec70ac6863a45f2b04447e3179bd7082afced3c3386a8 4396 intel-microcode_3.20180312.1_i386.buildinfo 7164d7762d80cce70df7d6f23cd925e598892763957805afb536841171f47994 1297124 intel-microcode_3.20180312.1_i386.deb Files: b60be497151b2719fc5d296ce6d0394c 1785 non-free/admin standard intel-microcode_3.20180312.1.dsc 46ffd844248ab31fcaa27d89e58cd8c8 1685068 non-free/admin standard intel-microcode_3.20180312.1.tar.xz 6d74443b776365baad453c14bf3e32b1 5605 non-free/admin standard intel-microcode_3.20180312.1_amd64.buildinfo 507c36b14bba3e8de4ee1f3951eee997 1156188 non-free/admin standard intel-microcode_3.20180312.1_amd64.deb b3b72217cdbd4e0e0f602235b6e9a5e6 4396 non-free/admin standard intel-microcode_3.20180312.1_i386.buildinfo 8be9ffae0ca75b34c38bd22919b5c17b 1297124 non-free/admin standard intel-microcode_3.20180312.1_i386.deb -----BEGIN PGP SIGNATURE----- iQIzBAEBCgAdFiEEq7GuO+cOOhDUp+2l/hG/posVjpgFAlqpGAAACgkQ/hG/posV jpjIRRAAqyAgPLi1QhwSSfg+i5sYdm52VWBQQLB6QXY/pSK8Je+ivzwjLa3rzWMZ stawJAiJVkCpRPQ8AP941werxfmQsJHLDd6lvxpwuMUWcKaKV9NDZ6WeotIi6rkD IcVPxG3I7/oU0f08xliJBdV8JfF1y2JfQytgccx/fXLp4B//m/rT9TPUoFvoOq5v ex4glSH8Whjw/h3myo9hPNNrKjJz2X4rc/3xOKEJXlsnaXdV3U3a2Z/JeFJCxLO4 RsBmIPje7+yiAP2txNQVcWJOHovJkCgwotz5GYTJQuQCmXUvyznSjkicu7Nw4Ajr iaC9CENZPo8+IxDiOiQivSodPQWUV+ONGohsv8fUr7ssfs6VidFlRXUPVvbU5+lK IggC4uZE7t/Xamg5aumwcwsp3agT6BZZQPrOUiK+HDHsSR28XuWsSVeNxILWbBEm U9zp6QwVuA5Qlo2oiQSTtmV6UqbXZIfoH/Z6IpWCi1nwn5kOjtIqCKhlyohv2hv1 nIND++7HNPzOpN9lqwCt7AQAVroTO9PDQGX1tT/ZjY71wo774p5LXUm02kLTxuUP 00jkc7fYI3JUaBhlqqn1hK54JRzIh8QP8dk8bZLaRZHGdKCiXoOM2bCgBThTtIJe O8jAcdOSymLsUtWkROuH5x/dBEjT0CzGVS/ShqJREtLVbjHZT6Q= =7yrS -----END PGP SIGNATURE-----
