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opensbi

RISC-V Open Source Supervisor Binary Interface

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general
  • source: opensbi (main)
  • version: 1.6-1
  • maintainer: Vagrant Cascadian (DMD)
  • uploaders: Karsten Merker [DMD]
  • arch: all
  • std-ver: 4.7.0
  • VCS: Git (Browse, QA)
versions [more versions can be listed by madison] [old versions available from snapshot.debian.org]
[pool directory]
  • o-o-stable: 0.9-1
  • oldstable: 1.1-2
  • old-bpo: 1.5.1-1~bpo12+2
  • stable: 1.6-1
  • testing: 1.6-1
  • unstable: 1.6-1
versioned links
  • 0.9-1: [.dsc, use dget on this link to retrieve source package] [changelog] [copyright] [rules] [control]
  • 1.1-2: [.dsc, use dget on this link to retrieve source package] [changelog] [copyright] [rules] [control]
  • 1.5.1-1~bpo12+2: [.dsc, use dget on this link to retrieve source package] [changelog] [copyright] [rules] [control]
  • 1.6-1: [.dsc, use dget on this link to retrieve source package] [changelog] [copyright] [rules] [control]
binaries
  • opensbi
action needed
A new upstream version is available: 1.7 high
A new upstream version 1.7 is available, you should consider packaging it.
Created: 2025-07-04 Last update: 2025-11-16 06:00
version in VCS is newer than in repository, is it time to upload? normal
vcswatch reports that this package seems to have a new changelog entry (version 1.7-1~0, distribution UNRELEASED) and new commits in its VCS. You should consider whether it's time to make an upload.

Here are the relevant commit messages:
commit db259238364804c243d6f6bbcc1f3f9d74703a62
Author: Vagrant Cascadian <vagrant@debian.org>
Date:   Wed Nov 5 15:39:00 2025 -0800

    debian/changelog: Update for upstream 1.7.

commit 9f9bf6bf995c92347e00a35d8d93ba5f0d2760fd
Author: Vagrant Cascadian <vagrant@debian.org>
Date:   Wed Nov 5 15:36:38 2025 -0800

    debian/control: Update to Standards-Version 4.7.2.

commit ccaa51dd7f01e2ec3d2f81759198aa7abf71cefe
Author: vhaudiquet <valentin.haudiquet@canonical.com>
Date:   Mon Nov 3 20:22:09 2025 +0100

    debian/copyright: Fix old-fsf-address-in-copyright-file

commit 4f8cb3d7e4b21770ab23e7a9f6d3824d738bb85b
Author: Vagrant Cascadian <vagrant@debian.org>
Date:   Wed Nov 5 15:29:11 2025 -0800

    debian/copyright: Update for v1.7.

commit 190db944105c0820438a2aaacd61256bce329f79
Merge: 7ee4998 a32a910
Author: Vagrant Cascadian <vagrant@debian.org>
Date:   Wed Nov 5 15:16:36 2025 -0800

    Merge tag 'v1.7' into debian/latest
    
    OpenSBI v1.7

commit a32a91069119e7a5aa31e6bc51d5e00860be3d80
Author: Anup Patel <apatel@ventanamicro.com>
Date:   Mon Jun 30 08:37:30 2025 +0530

    include: Bump-up version to 1.7
    
    Update the OpenSBI version to 1.7 as part of release preparation.
    
    Signed-off-by: Anup Patel <apatel@ventanamicro.com>
    Signed-off-by: Anup Patel <anup@brainfault.org>

commit c2671bb69f17722a537b2b0403cf2d70639af346
Author: Rahul Pathak <rpathak@ventanamicro.com>
Date:   Wed Jun 18 11:08:54 2025 +0530

    lib: rpmi: Make RPMI drivers as non-experimental
    
    As RPMI v1.0 specification is frozen, disable the
    experimental tag for such RPMI drivers.
    
    Signed-off-by: Rahul Pathak <rpathak@ventanamicro.com>
    Reviewed-by: Anup Patel <anup@brainfault.org>
    Link: https://lore.kernel.org/r/20250618053854.2577299-2-rpathak@ventanamicro.com
    Signed-off-by: Anup Patel <anup@brainfault.org>

commit a5fdef45dbd50d40162852a2b7333135fe3439be
Author: Rahul Pathak <rpathak@ventanamicro.com>
Date:   Wed Jun 18 11:08:53 2025 +0530

    lib: utils: Add Implementation ID and Version as RPMI MPXY attributes
    
    The latest frozen RPMI spec has added Implementation ID
    and Implementation Version as message protocol specific
    mpxy attributes. Add support for these.
    
    Signed-off-by: Rahul Pathak <rpathak@ventanamicro.com>
    Reviewed-by: Anup Patel <anup@brainfault.org>
    Link: https://lore.kernel.org/r/20250618053854.2577299-1-rpathak@ventanamicro.com
    Signed-off-by: Anup Patel <anup@brainfault.org>

commit 13abda516928a8823e6b7b65b0a29bb338484227
Author: Chao-ying Fu <cfu@wavecomp.com>
Date:   Sat Jun 14 22:57:56 2025 +0530

    lib: sbi_platform: Add platform specific pmp_set() and pmp_disable()
    
    Allow platforms to implement platform specific PMP setup and
    PMP disable functions which are called before actual PMP CSRs
    are configured.
    
    Also, implement pmp_set() and pmp_disable() for MIPS P8700.
    
    Signed-off-by: Chao-ying Fu <cfu@mips.com>
    Signed-off-by: Anup Patel <apatel@ventanamicro.com>
    Link: https://lore.kernel.org/r/20250614172756.153902-1-apatel@ventanamicro.com
    Signed-off-by: Anup Patel <anup@brainfault.org>

commit 324021423d063702a5cb2d4207a3a9c4e999549f
Author: Jesse Taube <jesse@rivosinc.com>
Date:   Wed May 28 08:46:04 2025 -0700

    lib: sbi: dbtr: Fix update_triggers to match SBI
    
    OpenSBI implements sbi_dbtr_update_trig as
    `sbi_dbtr_update_trig(unsigned long trig_idx_base,
                          unsigned long trig_idx_mask)`
    yet SBI v3.0-rc7 Chapter 19. Debug Triggers Extension [0] declares it as
    `sbi_debug_update_triggers(unsigned long trig_count)`
    
    Change update_triggers to match SBI.
    
    [0] https://github.com/riscv-non-isa/riscv-sbi-doc/tree/v3.0-rc7/src/ext-debug-triggers.adoc
    
    Fixes: 97f234f15c96 ("lib: sbi: Introduce the SBI debug triggers extension support")
    Signed-off-by: Jesse Taube <jesse@rivosinc.com>
    Reviewed-by: Himanshu Chauhan <hchauhan@ventanamicro.com>
    Tested-by: Charlie Jenkins <charlie@rivosinc.com>
    Reviewed-by: Charlie Jenkins <charlie@rivosinc.com>
    Link: https://lore.kernel.org/r/20250528154604.571815-1-jesse@rivosinc.com
    Signed-off-by: Anup Patel <anup@brainfault.org>

commit 03f44e6b82a4debd0e5a3a67cf7f2da9f4a7dfca
Author: Xiang W <wxjstz@126.com>
Date:   Wed May 14 13:24:02 2025 +0800

    lib: sbi: Optimize saddr mapping in sbi_dbtr.c
    
    The original implementation mapped saddr individually for each entry.
    The updated code now maps saddr for all entries in a single operation.
    This change reduces the number of PMP (Physical Memory Protection)
    operations, improving efficiency and performance.
    
    Tested-by: Himanshu Chauhan <hchauhan@ventanamicro.com>
    Reviewed-by: Himanshu Chauhan <hchauhan@ventanamicro.com>
    Signed-off-by: Xiang W <wxjstz@126.com>
    Link: https://lore.kernel.org/r/20250514052422.575551-1-wxjstz@126.com
    Signed-off-by: Anup Patel <anup@brainfault.org>

commit 033e0e2353ddab76039e62b46c9f77e178bac689
Author: Jesse Taube <jesse@rivosinc.com>
Date:   Wed Jun 4 06:52:25 2025 -0700

    lib: sbi: dbtr: Fix shared memory layout
    
    The existing sbi_dbtr_shmem_entry has a size of 5 * XLEN with the final
    entry being idx. This is in contrast to the SBI v3.0-rc7 Chapter 19.
    Debug Triggers Extension [0] where idx and trig_state share the same
    offset (0) in shared memory, with a total size of 4 * XLEN for all the
    SBI calls.
    
    Replace struct with union to match memory layout described in SBI.
    
    [0] https://github.com/riscv-non-isa/riscv-sbi-doc/tree/v3.0-rc7/src/ext-debug-triggers.adoc
    
    Fixes: 97f234f15c96 ("lib: sbi: Introduce the SBI debug triggers extension support")
    Signed-off-by: Jesse Taube <jesse@rivosinc.com>
    Reviewed-by: Charlie Jenkins <charlie@rivosinc.com>
    Tested-by: Charlie Jenkins <charlie@rivosinc.com>
    Reviewed-by: Himanshu Chauhan <hchauhan@ventanamicro.com>
    Tested-by: Himanshu Chauhan <hchauhan@ventanamicro.com>
    Link: https://lore.kernel.org/r/20250604135225.842241-1-jesse@rivosinc.com
    Signed-off-by: Anup Patel <anup@brainfault.org>

commit 9f64f0619334eea34df66a1816b1be589870ac4e
Author: Anup Patel <apatel@ventanamicro.com>
Date:   Fri Jun 6 11:28:10 2025 +0530

    lib: utils: Fix fdt_parse_aclint_node() for non-contiguous hartid
    
    Currently, the fdt_parse_aclint_node() does not handle non-contiguous
    hartid correctly and returns incorrect first_hartid and hart_count.
    This is because the for-loop in fdt_parse_aclint_node() skips a hartid
    for which hartindex is not available (aka corresponding CPU DT node
    is disabled).
    
    For example, on a platform with 4 HARTs (hartid 0, 1, 2, and 3) where
    CPU DT nodes with hartid 0 and 2 are disabled, the fdt_parse_aclint_node()
    returns first_hartid = 1 and hart_count = 3 which is incorrect.
    
    To address the above issue, drop the sbi_hartid_to_hartindex() check
    from the for-loop of fdt_parse_aclint_node().
    
    Fixes: 5e90e54a1a53 ("lib: utils:Check that hartid is valid")
    Reported-by: Maria Mbaye <MameMaria.Mbaye@microchip.com>
    Signed-off-by: Anup Patel <apatel@ventanamicro.com>
    Link: https://lore.kernel.org/r/20250606055810.237441-1-apatel@ventanamicro.com
    Signed-off-by: Anup Patel <anup@brainfault.org>

commit 7dd09bfeca310f540d73e29c600958faead0849e
Author: Anup Patel <apatel@ventanamicro.com>
Date:   Tue May 27 18:18:21 2025 +0530

    lib: sbi: Revert entry_count before doing hsm stop in hsm wait loop
    
    Using hsm stop in hsm wait loop causes secondary harts to be stuck
    forever in OpenSBI on RISC-V platforms where HSM hart hotplug is
    available and all harts come-up at the same time during system
    power-on.
    
    For example, lets say we have two harts A and B on a RISC-V platform
    with HSM hart hotplug which come-up at the same time during system
    power-on. The hart A enters OpenSBI before hart B hence it becomes
    the primary (or cold-boot) hart whereas hart B becomes the secondary
    (or warm-boot) hart. The hart A follows the OpenSBI cold-boot path
    and registers hsm device before hart B enters OpenSBI. The hart B
    eventually enters OpenSBI and follows the OpenSBI warm-boot path
    so it will increment it's own entry_count before entering hsm wait
    loop where it sees hsm device and stops itself. Later as part of
    the Linux boot-up sequence, hart A issues SBI HSM start call to
    bring-up hart B but OpenSBI sees entry_count != init_count for
    hart B in sbi_hsm_hart_start() hence hsm_device_hart_start() is
    not called for hart B resulting in hart B stuck forever in OpenSBI.
    
    To fix the above issue, revert entry_count before doing hsm stop
    in hsm wait loop.
    
    Fixes: d844deadec94 ("lib: sbi: Use hsm stop for hsm wait")
    Signed-off-by: Anup Patel <apatel@ventanamicro.com>
    Reviewed-by: Nick Hu <nick.hu@sifive.com>
    Link: https://lore.kernel.org/r/20250527124821.2113467-1-apatel@ventanamicro.com
    Signed-off-by: Anup Patel <anup@brainfault.org>

commit 6f8bcae4cb12d92e0c198ba3b7e2f56e2fbb7289
Author: Inochi Amaoto <inochiama@gmail.com>
Date:   Fri May 23 16:53:48 2025 +0800

    lib: utils/irqchip: always parse msi information for each aplic device
    
    OpenSBI only parses MSI information of the first next level subdomain
    for now, which makes the root domain misconfigured in some case:
    1. the msi is not enabled on the first subdomain of the root domain,
       but other subdomains enable MSI.
    2. the root domain is set as direct mode, but its subdomains enable MSI.
    
    So it is needed to parse all child of the root domain, Otherwise, the
    some non-root domains are broken. As the specification says, it is
    safe to parse the MSI information of all its subdomain and write the
    msiaddrcfg register of the non root domain as they are read only.
    
    Parse the aplic MSI information recursively for all aplic device.
    
    Reviewed-by: Anup Patel <anup@brainfault.org>
    Signed-off-by: Inochi Amaoto <inochiama@gmail.com>
    Link: https://lore.kernel.org/r/20250523085348.1690368-1-inochiama@gmail.com
    Signed-off-by: Anup Patel <anup@brainfault.org>

commit 771c656181c360ed351a4a96a3e25102cbc140b9
Author: Samuel Holland <samuel.holland@sifive.com>
Date:   Wed May 21 18:34:33 2025 -0700

    lib: sbi: fwft: Use only the provided PMLEN value
    
    As of riscv-sbi-doc commit c7d3d1f7dcaa ("ext-fwft: use the provided
    value in fwft_set(POINTER_MASKING_PMLEN)"), the SBI implementation must
    use only the provided PMLEN value or else fail. It may not fall back to
    a larger PMLEN value.
    
    Signed-off-by: Samuel Holland <samuel.holland@sifive.com>
    Reviewed-by: Radim Krčmář <rkrcmar@ventanamicro.com>
    Link: https://lore.kernel.org/r/20250522013503.2556053-1-samuel.holland@sifive.com
    Signed-off-by: Anup Patel <anup@brainfault.org>

commit f30a54f3b3a091c225a00476f4039bf399badd1f
Author: Clément Léger <cleger@rivosinc.com>
Date:   Mon May 19 10:39:49 2025 +0200

    lib: sbi: pmu: Remove MIP clearing from pmu_sse_enable()
    
    Clearing MIP at that point means that we can probably lose a pending
    interrupt. This should not happen, remove MIP clearing from there.
    
    Signed-off-by: Clément Léger <cleger@rivosinc.com>
    Reviewed-by: Atish Patra <atishp@rivosinc.com>
    Reviewed-by: Samuel Holland <samuel.holland@sifive.com>
    Link: https://lore.kernel.org/r/20250519083950.739044-3-cleger@rivosinc.com
    Signed-off-by: Anup Patel <anup@brainfault.org>

commit b31a0a24279d46ae4981e1691fe56e245b6d39a0
Author: Clément Léger <cleger@rivosinc.com>
Date:   Mon May 19 10:39:48 2025 +0200

    lib: sbi: pmu: Add SSE register/unregister() callbacks
    
    As soon as the SSE event is registered, there is no reason not to
    delegate the interrupt. Split the PMU SSE enable/disable()
    callbacks by moving MIDELEG setting to register/unregister().
    
    Signed-off-by: Clément Léger <cleger@rivosinc.com>
    Reviewed-by: Atish Patra <atishp@rivosinc.com>
    Reviewed-by: Samuel Holland <samuel.holland@sifive.com>
    Link: https://lore.kernel.org/r/20250519083950.739044-2-cleger@rivosinc.com
    Signed-off-by: Anup Patel <anup@brainfault.org>

commit 6d23a9c5707de7243c0b3423724c0e4f3e1ee40d
Author: Khem Raj <raj.khem@gmail.com>
Date:   Wed May 14 19:59:31 2025 -0700

    Makefile: Add flag for reprodubility compiler flags
    
    Provides mechanism to remove absolute paths from binaries using
    -ffile-prefix-map
    
    It will help distros (e.g. yocto based ones ) which want to ship
    the .elf files but need to scrub absolute paths in objects
    
    Reviewed-by: Anup Patel <anup@brainfault.org>
    Signed-off-by: Khem Raj <raj.khem@gmail.com>
    Link: https://lore.kernel.org/r/20250515025931.3383142-1-raj.khem@gmail.com
    Signed-off-by: Anup Patel <anup@brainfault.org>

commit 66ab965e54017292d530033ffaae127389c45458
Author: Chao-ying Fu <icebergfu@gmail.com>
Date:   Thu May 22 14:21:34 2025 -0700

    platform: generic: mips: add P8700
    
    Extend generic platform to support MIPS P8700.
    
    Signed-off-by: Chao-ying Fu <cfu@mips.com>
    Reviewed-by: Anup Patel <anup@brainfault.org>
    Link: https://lore.kernel.org/r/20250522212141.3198-2-cfu@mips.com
    Signed-off-by: Anup Patel <anup@brainfault.org>

commit 3f8159aa068e6b2447abcf2df00b913b7f852456
Author: Ziang Wang <wangziang.ok@bytedance.com>
Date:   Wed May 7 15:46:20 2025 +0800

    lib: utils: hsm: Do not fail on EALREADY in rpmi-hsm fixup.
    
    In case harts are divided into groups that use different
    rpmi-hsm channels in different mailboxes, the suspend
    state fixup function will return EALREADY on secondary
    entry, simply skip on this error.
    
    Reviewed-by: Anup Patel <anup@brainfault.org>
    Signed-off-by: Ziang Wang <wangziang.ok@bytedance.com>
    Link: https://lore.kernel.org/r/20250507074620.3162747-1-wangziang.ok@bytedance.com
    Signed-off-by: Anup Patel <anup@brainfault.org>

commit 27347f0902cdf69b20786726e3827df6df089b2a
Author: Charlie Jenkins <charlie@rivosinc.com>
Date:   Wed Apr 30 16:38:31 2025 -0700

    Makefile: Make $(LLVM) more flexible
    
    Introduce a way for developers to easily switch between LLVM versions
    with LLVM=/path/to/llvm/ and LLVM=-version. This is a useful
    addition to the existing LLVM=1 variable which will select the first
    clang and llvm binutils available on the path.
    
    Reviewed-by: Anup Patel <anup@brainfault.org>
    Tested-by: Anup Patel <anup@brainfault.org>
    Signed-off-by: Charlie Jenkins <charlie@rivosinc.com>
    Link: https://lore.kernel.org/r/20250430-improve_llvm_building-v1-1-caae96cc6be6@rivosinc.com
    Signed-off-by: Anup Patel <anup@brainfault.org>

commit 69a0f0245f39ea3af4685cab4cb2dda90acd17cd
Author: James Raphael Tiovalen <jamestiotio@gmail.com>
Date:   Tue May 20 21:25:33 2025 +0800

    lib: sbi: pmu: Return SBI_EINVAL if cidx_mask is 0
    
    Currently, when configuring a matching programmable HPM counter with
    Sscofpmf being present, cidx_base > 2, and cidx_mask == 0 to monitor
    either the CPU_CYCLES or INSTRUCTIONS hardware event,
    sbi_pmu_ctr_cfg_match will succeed but it will configure the
    corresponding fixed counter instead of the counter specified by the
    cidx_base parameter.
    
    During counter configuration, the following issues may arise:
    - If the SKIP_MATCH flag is set, an out-of-bounds memory read of the
    phs->active_events array would occur, which could lead to undefined
    behavior.
    
    - If the CLEAR_VALUE flag is set, the corresponding fixed counter will
    be reset, which could be considered unexpected behavior.
    
    - If the AUTO_START flag is set, pmu_ctr_start_hw will silently start
    the fixed counter, even though it has already started. From the
    supervisor's perspective, nothing has changed, which could be confusing.
    The supervisor will not see the SBI_ERR_ALREADY_STARTED error code since
    sbi_pmu_ctr_cfg_match does not return the error code of
    pmu_ctr_start_hw.
    
    The only way to detect these issues is to check the ctr_idx return value
    of sbi_pmu_ctr_cfg_match and compare it with cidx_base.
    
    Fix these issues by returning the SBI_ERR_INVALID_PARAM error code if
    the cidx_mask parameter value being passed in is 0 since an invalid
    parameter should not lead to a successful sbi_pmu_ctr_cfg_match but with
    unexpected side effects.
    
    Following a similar rationale, add the validation check to
    sbi_pmu_ctr_start and sbi_pmu_ctr_stop as well since sbi_fls is
    undefined when the mask is 0.
    
    This also aligns OpenSBI's behavior with KVM's.
    
    Signed-off-by: James Raphael Tiovalen <jamestiotio@gmail.com>
    Reviewed-by: Atish Patra <atishp@rivosinc.com>
    Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
    Link: https://lore.kernel.org/r/20250520132533.30974-1-jamestiotio@gmail.com
    Signed-off-by: Anup Patel <anup@brainfault.org>

commit d4f5a16598ae4469ee9355a13366292758901c17
Author: Anup Patel <apatel@ventanamicro.com>
Date:   Fri May 16 17:58:44 2025 +0530

    include: sbi: Change SBI spec version to 3.0
    
    Now that SBI v3.0 specification is frozen, change runtime SBI version
    implemented by OpenSBI to v3.0. Also, mark extensions defined by the
    SBI v3.0 specification as non-experimental.
    
    Signed-off-by: Anup Patel <apatel@ventanamicro.com>
    Reviewed-by: Clément Léger <cleger@rivosinc.com>
    Reviewed-by: Atish Patra <atishp@rivosinc.com>
    Link: https://lore.kernel.org/r/20250516122844.113423-1-apatel@ventanamicro.com
    Signed-off-by: Anup Patel <anup@brainfault.org>

commit 60c3f97de840e6ad35494f9228fc83600d1dc5a2
Author: Yao Zi <ziyao@disroot.org>
Date:   Fri May 16 13:33:53 2025 +0000

    lib: utils: fdt: Claim Zicntr if time CSR emulation is possible
    
    OpenSBI is capable of emulating time CSR through an external timer
    for HARTs that don't implement a full Zicntr extension. Let's add
    Zicntr extension in the FDT if CSR emulation is active.
    
    This avoids hardcoding the extension in the devicetree, which may
    confuse pre-SBI bootloaders.
    
    Signed-off-by: Yao Zi <ziyao@disroot.org>
    Reviewed-by: Anup Patel <anup@brainfault.org>
    Link: https://lore.kernel.org/r/20250516133352.36617-4-ziyao@disroot.org
    Signed-off-by: Anup Patel <anup@brainfault.org>

commit 7e31dc80525f752d97c2c5a97eb4b9583054e8bc
Author: Yao Zi <ziyao@disroot.org>
Date:   Fri May 16 13:33:52 2025 +0000

    lib: sbi: hart: Detect existence of cycle and instret CSRs for Zicntr
    
    Zicntr extension specifies three read-only CSRs, time, cycle and
    instret. It isn't sufficient to report Zicntr is fully supported with
    only time CSR detected.
    
    This patch introduces a bitmap to sbi_hart_features to record
    availability of these CSRs, which are detected using traps. Zicntr is
    reported as present if and only if three CSRs are all available on the
    HARTs.
    
    Sites originally depending on SBI_HART_EXT_ZICNTR for detecting
    existence of time CSR are switched to detect SBI_HART_CSR_TIME instead.
    
    Suggested-by: Anup Patel <anup@brainfault.org>
    Signed-off-by: Yao Zi <ziyao@disroot.org>
    Reviewed-by: Anup Patel <anup@brainfault.org>
    Link: https://lore.kernel.org/r/20250516133352.36617-3-ziyao@disroot.org
    Signed-off-by: Anup Patel <anup@brainfault.org>

commit 2bb76326496440996b44bf20f3ceab127c7f72ae
Author: Alvin Chang <alvinga@andestech.com>
Date:   Wed Apr 30 17:10:07 2025 +0800

    lib: utils: Fix fdt_mpxy_init() not returning error code
    
    It seems that current implementation doesn't fail on fdt_mpxy_init(),
    because platforms might not have any MPXY devices. In fact, if there are
    no MPXY devices, fdt_driver_init_all() will return SBI_OK.
    
    More importantly, if there is any MPXY device which fails the
    initialization, OpenSBI must check the error code and stop the booting.
    Thus, this commit adds the return value for fdt_mpxy_init().
    
    Signed-off-by: Alvin Chang <alvinga@andestech.com>
    Reviewed-by: Anup Patel <anup@brainfault.org>
    Link: https://lore.kernel.org/r/20250430091007.3768180-1-alvinga@andestech.com
    Signed-off-by: Anup Patel <anup@brainfault.org>

commit f3cce5b97f15f5ca87409902ca6a856b5012a5b3
Author: Anup Patel <apatel@ventanamicro.com>
Date:   Mon May 12 14:08:27 2025 +0530

    lib: utils/mpxy: Remove p2a_db_index from RPMI system MSI attributes
    
    The discovery of P2A doorbell system MSI index is now through RPMI
    shared memory DT node so remove p2a_db_index from RPMI system MSI
    attributes and access it as a mailbox channel attribute.
    
    Signed-off-by: Anup Patel <apatel@ventanamicro.com>
    Link: https://lore.kernel.org/r/20250512083827.804151-5-apatel@ventanamicro.com
    Signed-off-by: Anup Patel <anup@brainfault.org>

commit 8fadfebdd1c2fb8680d4a9c482d577e9f0e28572
Author: Anup Patel <apatel@ventanamicro.com>
Date:   Mon May 12 14:08:26 2025 +0530

    lib: utils/mailbox: Parse A2P doorbell value from DT
    
    The A2P doorbell value written to the 32-bit A2P doorbell value
    must be discoverd from device tree instead of always using the
    default value 1.
    
    Signed-off-by: Anup Patel <apatel@ventanamicro.com>
    Link: https://lore.kernel.org/r/20250512083827.804151-4-apatel@ventanamicro.com
    Signed-off-by: Anup Patel <anup@brainfault.org>

commit a79566175c01e369d9c5536aa9accbb5c17e2376
Author: Anup Patel <apatel@ventanamicro.com>
Date:   Mon May 12 14:08:25 2025 +0530

    lib: utils/mailbox: Parse P2A doorbell system MSI index from DT
    
    The P2A doorbell system MSI index is expected to be discovered from
    device tree instead of RPMI system MSI service group attribute. This
    is based on ARC feedback before RPMI spec was frozen.
    
    Let's parse P2A doorbell system MSI index from device tree and also
    expose it as rpmi channel attribute to RPMI client drivers.
    
    Signed-off-by: Anup Patel <apatel@ventanamicro.com>
    Link: https://lore.kernel.org/r/20250512083827.804151-3-apatel@ventanamicro.com
    Signed-off-by: Anup Patel <anup@brainfault.org>

commit 8ca08044c24c34ed4247c8a31fbce0e3feeaa518
Author: Anup Patel <apatel@ventanamicro.com>
Date:   Mon May 12 14:08:24 2025 +0530

    lib: utils/mailbox: Update DT register name of A2P doorbell
    
    The latest device tree bindings define A2P doorbell register name as
    "a2p-doorbell" so update rpmi_shmem_transport_init() accordingly.
    
    Signed-off-by: Anup Patel <apatel@ventanamicro.com>
    Link: https://lore.kernel.org/r/20250512083827.804151-2-apatel@ventanamicro.com
    Signed-off-by: Anup Patel <anup@brainfault.org>

commit 8a3071222ae57e7a1736c6e953fa1ab3628e599e
Author: Chao-ying Fu <icebergfu@gmail.com>
Date:   Mon May 19 17:42:06 2025 +0530

    lib: Emulate AMO instructions when Zaamo is not available
    
    The AMO instructions are very critical for Linux so allow low-end
    RISC-V implementations without Zaamo to boot Linux by emulating AMO
    instructions using Zalrsc when OpenSBI is compiled without Zaamo.
    
    Signed-off-by: Chao-ying Fu <cfu@mips.com>
    Signed-off-by: Anup Patel <apatel@ventanamicro.com>
    Link: https://lore.kernel.org/r/20250519121207.976949-1-apatel@ventanamicro.com
    Signed-off-by: Anup Patel <anup@brainfault.org>

commit 017a161788310ef515831821f14597e657512f97
Author: Parshintsev Anatoly <anatoly.parshintsev@syntacore.com>
Date:   Mon Apr 21 15:47:29 2025 +0300

    Makefile: fix missing .debug_frame DWARF section for GCC
    
    When OpenSBI is built with a relatively new compiler (gcc-13 and greater)
    I observed that GDB is unable to produce proper backtraces and some
    variable values appear corrupted (even if the associated DWARF
    location descriptor is correct).
    
    Turns out that to properly work with debug information, debuggers often
    need to unwind the stack. They generally rely on Call Frame Information
    (CFI) records provided by the compiler to facilitate this task.
    Currently, the GCC compiler offers two mechanisms:
    
    - `.debug_frame` section (as described in the DWARF specification).
    - `.eh_frame` sections (as described in LSB documents).
    
    The latter (`.eh_frame`) supports stack unwinding at runtime, providing
    a framework for C++ exceptions or enabling backtrace generation using
    libraries like libunwind. However, the downside of this approach is that
    these sections should be part of loadable segments.
    
    The former (`.debug_frame`) is simply an ordinary debug section.
    
    Starting from GCC 13, Linux targets enable the `-fasynchronous-unwind-tables`
    and `-funwind-tables` flags by default. Relevant commit:
    https://github.com/gcc-mirror/gcc/commit/3cd08f7168
    
    When these flags are active, the compiler generates `.eh_frame` sections
    instead of `.debug_frame`. Since OpenSBI is built using the **Linux
    toolchain**, this behavior applies to OpenSBI as well.
    
    The problem arises because the SBI build system uses `-Wl,--gc-sections`,
    which discards the `.eh_frame` section.
    
    Possible Fixes:
    
    1. Enforce `.debug_frame` generation – Modify compiler flags to generate
    `.debug_frame` instead of `.eh_frame`.
    2. Preserve `.eh_frame` in the linker script – Add `KEEP(*(.eh_frame))`
    to ensure the section is not discarded.
    
    I chose Option 1 because it avoids any runtime overhead.
    
    Signed-off-by: Parshintsev Anatoly <anatoly.parshintsev@syntacore.com>
    Reviewed-by: Anup Patel <anup@brainfault.org>
    Link: https://lore.kernel.org/r/20250421124729.36364-1-anatoly.parshintsev@syntacore.com
    Signed-off-by: Anup Patel <anup@brainfault.org>

commit d844deadec94201abd9370cecb065812411d1950
Author: Nick Hu <nick.hu@sifive.com>
Date:   Fri Apr 18 14:45:06 2025 +0800

    lib: sbi: Use hsm stop for hsm wait
    
    If we hotplug a core and then perform a suspend-to-RAM operation on a
    multi-core platform, the hotplugged CPU may be woken up along with the rest
    of the system, particularly on platforms that wake all cores from the
    deepest sleep state. When this happens, the hotplugged CPU enters the
    sbi_hsm_wait WFI wait loop instead of transitioning into a
    platform-specific low-power state. To address this, we add a HSM stop call
    within the wait loop. This allows platforms that support HSM stop to enter
    a low-power state when the CPU is unexpectedly woken up.
    
    Signed-off-by: Nick Hu <nick.hu@sifive.com>
    Reviewed-by: Samuel Holland <samuel.holland@sifive.com>
    Reviewed-by: Anup Patel <anup@brainfault.org>
    Link: https://lore.kernel.org/r/20250418064506.15771-1-nick.hu@sifive.com
    Signed-off-by: Anup Patel <anup@brainfault.org>

commit 316daaf1c299c29ac46e52145f65521f48ec63b5
Author: Radim Krčmář <rkrcmar@ventanamicro.com>
Date:   Tue Apr 29 16:25:50 2025 +0200

    lib: sbi_hart: properly reset Ssstateen
    
    sstateen* and hstateen* CSRs must be zeroed by M-mode if the mstateen*
    registers are missing, to avoid security issues.
    
    Reviewed-by: Anup Patel <anup@brainfault.org>
    Signed-off-by: Radim Krčmář <rkrcmar@ventanamicro.com>
    Link: https://lore.kernel.org/r/20250429142549.3673976-10-rkrcmar@ventanamicro.com
    Signed-off-by: Anup Patel <anup@brainfault.org>

commit 937118ca6520c7d61af5d792917610a234bb6c3a
Author: Radim Krčmář <rkrcmar@ventanamicro.com>
Date:   Tue Apr 29 16:25:49 2025 +0200

    lib: sbi_hart: add Ssstateen extension
    
    We already detect Smstateen, but Ssstateen exists as well and it doesn't
    have the M-state CSRs.
    
    Reviewed-by: Anup Patel <anup@brainfault.org>
    Signed-off-by: Radim Krčmář <rkrcmar@ventanamicro.com>
    Link: https://lore.kernel.org/r/20250429142549.3673976-9-rkrcmar@ventanamicro.com
    Signed-off-by: Anup Patel <anup@brainfault.org>

commit dac15cb91058f324df909dba4bfcb52f42ff9224
Author: Radim Krčmář <rkrcmar@ventanamicro.com>
Date:   Tue Apr 29 16:25:48 2025 +0200

    lib: sbi_hart: reset mstateen0
    
    The current logic clears some bits based on SBI known extensions.
    Be safe and do not leave enabled anything that SBI doesn't control.
    
    This is not a breaking change, because the register must be initialized
    to 0 by the ISA on reset, but it is better to not depend on it when we
    don't need to.
    
    Reviewed-by: Anup Patel <anup@brainfault.org>
    Signed-off-by: Radim Krčmář <rkrcmar@ventanamicro.com>
    Link: https://lore.kernel.org/r/20250429142549.3673976-8-rkrcmar@ventanamicro.com
    Signed-off-by: Anup Patel <anup@brainfault.org>

commit 8c814b5c9b03aac0d6bb2366e3c8fbce132ca4d9
Author: Radim Krčmář <rkrcmar@ventanamicro.com>
Date:   Tue Apr 29 16:25:47 2025 +0200

    lib: sbi_hart: fix sstateen emulation
    
    The Sstateen extension defines 4 sstateen registers, but SBI currently
    configures the execution environment to throw illegal instruction
    exception when accessing sstateen1-3.
    
    SBI should implement all sstateen registers, so delegate the
    implementation to hardware by setting the SE bit.
    
    Reviewed-by: Anup Patel <anup@brainfault.org>
    Signed-off-by: Radim Krčmář <rkrcmar@ventanamicro.com>
    Link: https://lore.kernel.org/r/20250429142549.3673976-7-rkrcmar@ventanamicro.com
    Signed-off-by: Anup Patel <anup@brainfault.org>

commit 6b877fb53b8da84c69f0832c7f2a343239ba609e
Author: Radim Krčmář <rkrcmar@ventanamicro.com>
Date:   Tue Apr 29 16:25:46 2025 +0200

    lib: sbi_hart: reset sstateen and hstateen
    
    Not resetting sstateen is a potential security hole, because U might be
    able to access state that S does not properly context-switch.
    Similar for hstateen with VS and HS.
    
    Reviewed-by: Anup Patel <anup@brainfault.org>
    Signed-off-by: Radim Krčmář <rkrcmar@ventanamicro.com>
    Link: https://lore.kernel.org/r/20250429142549.3673976-6-rkrcmar@ventanamicro.com
    Signed-off-by: Anup Patel <anup@brainfault.org>

commit 009f77a9f06bcb5a3a6252b3333171adb8c84512
Author: Radim Krčmář <rkrcmar@ventanamicro.com>
Date:   Tue Apr 29 16:25:45 2025 +0200

    lib: sbi_hart: reset hstatus
    
    hstatus.HU must be cleared, because U-mode could otherwise use the
    HLS/HSV instructions.  This would allow U-mode to read physical memory
    directly if vgatp and vsatp was 0.
    
    The remaining fields don't seem like a security vulnerability now, but
    clearing the whole CSR is not an issue, so do that be safe.
    
    Reviewed-by: Anup Patel <anup@brainfault.org>
    Signed-off-by: Radim Krčmář <rkrcmar@ventanamicro.com>
    Link: https://lore.kernel.org/r/20250429142549.3673976-5-rkrcmar@ventanamicro.com
    Signed-off-by: Anup Patel <anup@brainfault.org>

commit 65e8be4fe85e0e4410026a86256682a314ddf173
Author: Radim Krčmář <rkrcmar@ventanamicro.com>
Date:   Tue Apr 29 16:25:44 2025 +0200

    lib: sbi: use 64 bit csr macros
    
    Switch the most obvious cases to new macros.
    
    Reviewed-by: Anup Patel <anup@brainfault.org>
    Signed-off-by: Radim Krčmář <rkrcmar@ventanamicro.com>
    Link: https://lore.kernel.org/r/20250429142549.3673976-4-rkrcmar@ventanamicro.com
    Signed-off-by: Anup Patel <anup@brainfault.org>

commit f82c4bdf8cdd41ab35a9309105fad25f9ccb690f
Author: Radim Krčmář <rkrcmar@ventanamicro.com>
Date:   Tue Apr 29 16:25:43 2025 +0200

    lib: sbi: add 64 bit csr macros
    
    Most CSRs are XLEN bits wide, but some are 64 bit, so rv32 needs two
    accesses, plaguing the code with ifdefs.
    
    Add new helpers that split 64 bit operation into two operations on rv32.
    
    The helpers don't use "csr + 0x10", but append "H" at the end of the csr
    name to get a compile-time error when accessing a non 64 bit register.
    This has the downside that you have to use the name when accessing them.
    e.g. csr_read64(0x1234) or csr_read64(CSR_SATP) won't compile and the
    error messages you get for these bugs are not straightforward.
    
    Reviewed-by: Anup Patel <anup@brainfault.org>
    Signed-off-by: Radim Krčmář <rkrcmar@ventanamicro.com>
    Link: https://lore.kernel.org/r/20250429142549.3673976-3-rkrcmar@ventanamicro.com
    Signed-off-by: Anup Patel <anup@brainfault.org>

commit 99aabc6b8431a2bcf2b28a2423952e529de9fbc5
Author: Raj Vishwanathan <raj.vishwanathan@gmail.com>
Date:   Wed Apr 23 15:50:45 2025 -0700

    lib: sbi: Set the scratch allocation to alignment to cacheline size
    
    Set the scratch allocation alignment to cacheline size specified by
    riscv,cbom-block-size in the DTS file to avoid two atomic variables
    from the same cache line causing livelock on some platforms. If the
    cacheline is not specified, we set it a default value.
    
    Signed-off-by: Raj Vishwanathan <Raj.Vishwanathan@gmail.com>
    Reviewed-by: Anup Patel <anup@brainfault.org>
    Reviewed-by: Samuel Holland <samuel.holland@sifive.com>
    Link: https://lore.kernel.org/r/20250423225045.267983-1-Raj.Vishwanathan@gmail.com
    Signed-off-by: Anup Patel <anup@brainfault.org>

commit 4d0128ec58e109faed3f6357f982a0079361075a
Author: Alvin Chang <alvinga@andestech.com>
Date:   Wed Mar 26 14:20:51 2025 +0800

    lib: sbi_domain: Reduce memory usage of per-domain hart context
    
    In current implementation, the length of hartindex_to_context_table[]
    array is fixed as SBI_HARTMASK_MAX_BITS. However, the number of harts
    supported by the platform might not be SBI_HARTMASK_MAX_BITS and is
    usually smaller than SBI_HARTMASK_MAX_BITS. This means it is unnecessary
    to allocate such fixed-length array here.
    
    Precisely, current implementation always allocates 1024 bytes for
    hartindex_to_context_table[128] on RV64 platform. However, a platform
    supports two harts only needs hartindex_to_context_table[2], which only
    needs 16 bytes.
    
    This commit calculates needed size of hartindex_to_context_table[]
    according to supported number of harts on the platform when registering
    per-domain data, so that memory usage of per-domain context data can be
    reduced.
    
    Signed-off-by: Alvin Chang <alvinga@andestech.com>
    Reviewed-by: Anup Patel <anup@brainfault.org>
    Link: https://lore.kernel.org/r/20250326062051.3763530-1-alvinga@andestech.com
    Signed-off-by: Anup Patel <anup@brainfault.org>

commit 2b09a987010865f37508897f01024c0e6e408169
Author: Samuel Holland <samuel.holland@sifive.com>
Date:   Tue Mar 25 16:43:33 2025 -0700

    lib: sbi_platform: Remove the vendor_ext_check hook
    
    Now that the generic platform only sets .vendor_ext_provider if the
    function is really implemented, there is no need for a separate hook to
    check if a vendor extension is implemented.
    
    Signed-off-by: Samuel Holland <samuel.holland@sifive.com>
    Reviewed-by: Anup Patel <anup@brainfault.org>
    Link: https://lore.kernel.org/r/20250325234342.711447-11-samuel.holland@sifive.com
    Signed-off-by: Anup Patel <anup@brainfault.org>

commit 0dd8a26f1f3a6091a2ea6e4175fd63a79bba86d9
Author: Samuel Holland <samuel.holland@sifive.com>
Date:   Tue Mar 25 16:43:32 2025 -0700

    lib: utils/fdt: Remove fdt_match_node()
    
    This function has been obsoleted by the fdt_driver library and is no
    longer used.
    
    Signed-off-by: Samuel Holland <samuel.holland@sifive.com>
    Reviewed-by: Anup Patel <anup@brainfault.org>
    Link: https://lore.kernel.org/r/20250325234342.711447-10-samuel.holland@sifive.com
    Signed-off-by: Anup Patel <anup@brainfault.org>

commit 1c579675beb551f03ee0fae0c00af5e7a890da71
Author: Samuel Holland <samuel.holland@sifive.com>
Date:   Tue Mar 25 16:43:31 2025 -0700

    platform: generic: Initialize overrides with fdt_driver
    
    In addition to deduplicating the code, this also improves the match
    selection logic to respect the priority order of the compatible strings,
    as implemented in commit 0ffe265fd969 ("lib: utils/fdt: Respect
    compatible string fallback priority").
    
    Signed-off-by: Samuel Holland <samuel.holland@sifive.com>
    Reviewed-by: Anup Patel <anup@brainfault.org>
    Link: https://lore.kernel.org/r/20250325234342.711447-9-samuel.holland@sifive.com
    Signed-off-by: Anup Patel <anup@brainfault.org>

commit b80ded7756c233ebe9536b77823c51e916e43ffa
Author: Samuel Holland <samuel.holland@sifive.com>
Date:   Tue Mar 25 16:43:30 2025 -0700

    platform: generic: Remove platform override hooks
    
    Now that all of the overrides are modifying generic_platform_ops
    directly, remove the unused hooks and forwarding functions. The
    remaining members of struct platform_override match struct fdt_driver,
    so use that type instead. This allows a future commit to reuse the
    fdt_driver-based init function.
    
    Signed-off-by: Samuel Holland <samuel.holland@sifive.com>
    Reviewed-by: Anup Patel <anup@brainfault.org>
    Link: https://lore.kernel.org/r/20250325234342.711447-8-samuel.holland@sifive.com
    Signed-off-by: Anup Patel <anup@brainfault.org>

commit b353af63e2223409698a5afce7a6413204a499dd
Author: Samuel Holland <samuel.holland@sifive.com>
Date:   Tue Mar 25 16:43:29 2025 -0700

    platform: generic: Modify platform ops instead of using hooks
    
    Switch all existing platform overrides to use the helper pattern instead
    of the platform hooks. After this commit, only the .match_table and
    .init members of struct platform_override are used.
    
    There are two minor behavioral differences:
     - For Allwinner D1, fdt_add_cpu_idle_states() is now called before the
       body of generic_final_init(). This should have no functional impact.
     - For StarFive JH7110, if the /chosen/starfive,boot-hart-id property is
       missing, the code now falls back to using generic_coldboot_harts,
       instead of accepting any hart.
    
    Signed-off-by: Samuel Holland <samuel.holland@sifive.com>
    Reviewed-by: Anup Patel <anup@brainfault.org>
    Link: https://lore.kernel.org/r/20250325234342.711447-7-samuel.holland@sifive.com
    Signed-off-by: Anup Patel <anup@brainfault.org>
Created: 2025-11-06 Last update: 2025-11-12 19:02
1 open merge request in Salsa normal
There is 1 open merge request for this package on Salsa. You should consider reviewing and/or merging these merge requests.
Created: 2025-11-12 Last update: 2025-11-12 19:02
lintian reports 1 warning normal
Lintian reports 1 warning about this package. You should make the package lintian clean getting rid of them.
Created: 2025-04-10 Last update: 2025-04-10 09:31
Standards version of the package is outdated. wishlist
The package should be updated to follow the last version of Debian Policy (Standards-Version 4.7.2 instead of 4.7.0).
Created: 2025-02-21 Last update: 2025-02-27 13:25
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